AltiVec

Motorola's AltiVec Technology, embodied in the G4 processor, expands the current PowerPC architecture through addition of a 128-bit vector execution unit, which operates concurrently with existing integer and floating-point units. This provides for highly parallel operations, allowing for simultaneous execution of up to 16 operations in a single clock cycle.

This new approach expands the processor's capabilities to concurrently address high-bandwidth data processing (such as streaming video) and the algorithmic intensive computations which today are handled off-chip by other devices, such as graphics, audio, and modem functions.

The AltiVec instruction set allows operation on multiple bits within the 128-bit wide registers. This combination of new instructions, operation in parallel on multiple bits, and wider registers, provide speed enhancements of up to 30x on operations that are common in media processing.

Key elements of Motorola's AltiVec technology include:

128-bit vector execution unit
Parallel processing
162 new instructions
Vector permute unit

How Does AltiVec Compare with MMX?

The table below summarizes the differences between AltiVec and MMX. Any algorithm adapted for MMX can be ported directly to AltiVec, since MMX is a proper subset of AltiVec. However, the design of AltiVec allows superior adaptation of algorithms due to its data manipulation instructions and lack of context switching requirement.

High level Structural Overview for PowerPC
With AltiVec Technology

System using multiple PowerPC processors with AltiVec
technology, sharing a common bus bridge to shared memory

AltiVec	MMX
32 separate registers	8 registers, shares with FPU
128-bit per register	64-bits per register
more than 160 new instructions	57 new instructions
native floating-point data types	None
no interference with scalar FP registers	stalls the FP registers
no context or mode switching	context switching required (20-40 cycle hit)

References: Apple Computer, Motorola

For more information visit our G4 information Page